| Signal Name | FPGA Pin No. | Description |
|---|---|---|
| SW[0] | PIN_N25 | Toggle Switch[0] |
| SW[1] | PIN_N26 | Toggle Switch[1] |
| SW[2] | PIN_P25 | Toggle Switch[2] |
| SW[3] | PIN_AE14 | Toggle Switch[3] |
| SW[4] | PIN_AF14 | Toggle Switch[4] |
| SW[5] | PIN_AD13 | Toggle Switch[5] |
| SW[6] | PIN_AC13 | Toggle Switch[6] |
| SW[7] | PIN_C13 | Toggle Switch[7] |
| SW[8] | PIN_B13 | Toggle Switch[8] |
| SW[9] | PIN_A13 | Toggle Switch[9] |
| SW[10] | PIN_N1 | Toggle Switch[10] |
| SW[11] | PIN_P1 | Toggle Switch[11] |
| SW[12] | PIN_P2 | Toggle Switch[12] |
| SW[13] | PIN_T7 | Toggle Switch[13] |
| SW[14] | PIN_U3 | Toggle Switch[14] |
| SW[15] | PIN_U4 | Toggle Switch[15] |
| SW[16] | PIN_V1 | Toggle Switch[16] |
| SW[17] | PIN_V2 | Toggle Switch[17] |
| Signal Name | FPGA Pin No. | Description |
| DRAM_ADDR[0] | PIN_T6 | SDRAM Address[0] |
| DRAM_ADDR[1] | PIN_V4 | SDRAM Address[1] |
| DRAM_ADDR[2] | PIN_V3 | SDRAM Address[2] |
| DRAM_ADDR[3] | PIN_W2 | SDRAM Address[3] |
| DRAM_ADDR[4] | PIN_W1 | SDRAM Address[4] |
| DRAM_ADDR[5] | PIN_U6 | SDRAM Address[5] |
| DRAM_ADDR[6] | PIN_U7 | SDRAM Address[6] |
| DRAM_ADDR[7] | PIN_U5 | SDRAM Address[7] |
| DRAM_ADDR[8] | PIN_W4 | SDRAM Address[8] |
| DRAM_ADDR[9] | PIN_W3 | SDRAM Address[9] |
| DRAM_ADDR[10] | PIN_Y1 | SDRAM Address[10] |
| DRAM_ADDR[11] | PIN_V5 | SDRAM Address[11] |
| DRAM_DQ[0] | PIN_V6 | SDRAM Data[0] |
| DRAM_DQ[1] | PIN_AA2 | SDRAM Data[1] |
| DRAM_DQ[2] | PIN_AA1 | SDRAM Data[2] |
| DRAM_DQ[3] | PIN_Y3 | SDRAM Data[3] |
| DRAM_DQ[4] | PIN_Y4 | SDRAM Data[4] |
| DRAM_DQ[5] | PIN_R8 | SDRAM Data[5] |
| DRAM_DQ[6] | PIN_T8 | SDRAM Data[6] |
| DRAM_DQ[7] | PIN_V7 | SDRAM Data[7] |
| DRAM_DQ[8] | PIN_W6 | SDRAM Data[8] |
| DRAM_DQ[9] | PIN_AB2 | SDRAM Data[9] |
| DRAM_DQ[10] | PIN_AB1 | SDRAM Data[10] |
| DRAM_DQ[11] | PIN_AA4 | SDRAM Data[11] |
| DRAM_DQ[12] | PIN_AA3 | SDRAM Data[12] |
| DRAM_DQ[13] | PIN_AC2 | SDRAM Data[13] |
| DRAM_DQ[14] | PIN_AC1 | SDRAM Data[14] |
| DRAM_DQ[15] | PIN_AA5 | SDRAM Data[15] |
| DRAM_BA_0 | PIN_AE2 | SDRAM Bank Address[0] |
| DRAM_BA_1 | PIN_AE3 | SDRAM Bank Address[1] |
| DRAM_LDQM | PIN_AD2 | SDRAM Low-byte Data Mask |
| DRAM_UDQM | PIN_Y5 | SDRAM High-byte Data Mask |
| DRAM_RAS_N | PIN_AB4 | SDRAM Row Address Strobe |
| DRAM_CAS_N | PIN_AB3 | SDRAM Column Address Strobe |
| DRAM_CKE | PIN_AA6 | SDRAM Clock Enable |
| DRAM_CLK | PIN_AA7 | SDRAM Clock |
| DRAM_WE_N | PIN_AD3 | SDRAM Write Enable |
| DRAM_CS_N | PIN_AC3 | SDRAM Chip Select |
| Signal Name | FPGA Pin No. | Description |
| FL_ADDR[0] | PIN_AC18 | FLASH Address[0] |
| FL_ADDR[1] | PIN_AB18 | FLASH Address[1] |
| FL_ADDR[2] | PIN_AE19 | FLASH Address[2] |
| FL_ADDR[3] | PIN_AF19 | FLASH Address[3] |
| FL_ADDR[4] | PIN_AE18 | FLASH Address[4] |
| FL_ADDR[5] | PIN_AF18 | FLASH Address[5] |
| FL_ADDR[6] | PIN_Y16 | FLASH Address[6] |
| FL_ADDR[7] | PIN_AA16 | FLASH Address[7] |
| FL_ADDR[8] | PIN_AD17 | FLASH Address[8] |
| FL_ADDR[9] | PIN_AC17 | FLASH Address[9] |
| FL_ADDR[10] | PIN_AE17 | FLASH Address[10] |
| FL_ADDR[11] | PIN_AF17 | FLASH Address[11] |
| FL_ADDR[12] | PIN_W16 | FLASH Address[12] |
| FL_ADDR[13] | PIN_W15 | FLASH Address[13] |
| FL_ADDR[14] | PIN_AC16 | FLASH Address[14] |
| FL_ADDR[15] | PIN_AD16 | FLASH Address[15] |
| FL_ADDR[16] | PIN_AE16 | FLASH Address[16] |
| FL_ADDR[17] | PIN_AC15 | FLASH Address[17] |
| FL_ADDR[18] | PIN_AB15 | FLASH Address[18] |
| FL_ADDR[19] | PIN_AA15 | FLASH Address[19] |
| FL_ADDR[20] | PIN_Y15 | FLASH Address[20] |
| FL_ADDR[21] | PIN_Y14 | FLASH Address[21] |
| FL_DQ[0] | PIN_AD19 | FLASH Data[0] |
| FL_DQ[1] | PIN_AC19 | FLASH Data[1] |
| FL_DQ[2] | PIN_AF20 | FLASH Data[2] |
| FL_DQ[3] | PIN_AE20 | FLASH Data[3] |
| FL_DQ[4] | PIN_AB20 | FLASH Data[4] |
| FL_DQ[5] | PIN_AC20 | FLASH Data[5] |
| FL_DQ[6] | PIN_AF21 | FLASH Data[6] |
| FL_DQ[7] | PIN_AE21 | FLASH Data[7] |
| FL_CE_N | PIN_V17 | FLASH Chip Enable |
| FL_OE_N | PIN_W17 | FLASH Output Enable |
| FL_RST_N | PIN_AA18 | FLASH Reset |
| FL_WE_N | PIN_AA17 | FLASH Write Enable |
| Signal Name | FPGA Pin No. | Description |
| SRAM_ADDR[0] | PIN_AE4 | SRAM Address[0] |
| SRAM_ADDR[1] | PIN_AF4 | SRAM Address[1] |
| SRAM_ADDR[2] | PIN_AC5 | SRAM Address[2] |
| SRAM_ADDR[3] | PIN_AC6 | SRAM Address[3] |
| SRAM_ADDR[4] | PIN_AD4 | SRAM Address[4] |
| SRAM_ADDR[5] | PIN_AD5 | SRAM Address[5] |
| SRAM_ADDR[6] | PIN_AE5 | SRAM Address[6] |
| SRAM_ADDR[7] | PIN_AF5 | SRAM Address[7] |
| SRAM_ADDR[8] | PIN_AD6 | SRAM Address[8] |
| SRAM_ADDR[9] | PIN_AD7 | SRAM Address[9] |
| SRAM_ADDR[10] | PIN_V10 | SRAM Address[10] |
| SRAM_ADDR[11] | PIN_V9 | SRAM Address[11] |
| SRAM_ADDR[12] | PIN_AC7 | SRAM Address[12] |
| SRAM_ADDR[13] | PIN_W8 | SRAM Address[13] |
| SRAM_ADDR[14] | PIN_W10 | SRAM Address[14] |
| SRAM_ADDR[15] | PIN_Y10 | SRAM Address[15] |
| SRAM_ADDR[16] | PIN_AB8 | SRAM Address[16] |
| SRAM_ADDR[17] | PIN_AC8 | SRAM Address[17] |
| SRAM_DQ[0] | PIN_AD8 | SRAM Data[0] |
| SRAM_DQ[1] | PIN_AE6 | SRAM Data[1] |
| SRAM_DQ[2] | PIN_AF6 | SRAM Data[2] |
| SRAM_DQ[3] | PIN_AA9 | SRAM Data[3] |
| SRAM_DQ[4] | PIN_AA10 | SRAM Data[4] |
| SRAM_DQ[5] | PIN_AB10 | SRAM Data[5] |
| SRAM_DQ[6] | PIN_AA11 | SRAM Data[6] |
| SRAM_DQ[7] | PIN_Y11 | SRAM Data[7] |
| SRAM_DQ[8] | PIN_AE7 | SRAM Data[8] |
| SRAM_DQ[9] | PIN_AF7 | SRAM Data[9] |
| SRAM_DQ[10] | PIN_AE8 | SRAM Data[10] |
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